모두의 코드
NOP (Intel x86/64 assembly instruction)
NOP
No Operation
참고 사항
아래 표를 해석하는 방법은 x86-64 명령어 레퍼런스 읽는 법 글을 참조하시기 바랍니다.
Opcode | Instruction | Op/ | 64-Bit | Compat/ | Description |
---|---|---|---|---|---|
90 | NP | Valid | Valid | One byte no-operation instruction. | |
0F 1F /0 | NOP r/m16 | M | Valid | Valid | Multi-byte no-operation instruction. |
0F 1F /0 | NOP r/m32 | M | Valid | Valid | Multi-byte no-operation instruction. |
Instruction Operand Encoding
Op/En | Operand 1 | Operand 2 | Operand 3 | Operand 4 |
---|---|---|---|---|
NP | NA | NA | NA | NA |
M | ModRM:r/m (r) | NA | NA | NA |
Description
This instruction performs no operation. It is a one-byte or multi-byte NOP that takes up space in the instruction stream but does not impact machine context, except for the EIP register.
The multi-byte form of NOP is available on processors with model encoding:
CPUID.01H.EAX[Bytes 11:8] = 0110B or 1111B
The multi-byte NOP instruction does not alter the content of a register and will not issue a memory operation. The instruction's operation is the same in non-64-bit modes and 64-bit mode.
Operation
The one-byte NOP instruction is an alias mnemonic for the XCHG (E)AX, (E)AX instruction. The multi-byte NOP instruction performs no operation on supported processors and generates undefined opcode exception on processors that do not support the multi-byte NOP instruction. The memory operand form of the instruction allows software to create a byte sequence of "no operation" as one instruction. For situations where multiple-byte NOPs are needed, the recommended operations (32-bit mode and 64-bit mode) are:
Table 4-12. Recommended Multi-Byte Sequence of NOP Instruction
Length | Assembly | Byte Sequence |
---|---|---|
2 bytes | 66 NOP | 66 90H |
Flags Affected
None
Exceptions (All Operating Modes)
#UD If the LOCK prefix is used.
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