모두의 코드
VGETEXPPD (Intel x86/64 assembly instruction)
VGETEXPPD
Convert Exponents of Packed DP FP Values to DP FP Values
참고 사항
아래 표를 해석하는 방법은 x86-64 명령어 레퍼런스 읽는 법 글을 참조하시기 바랍니다.
Opcode/ | Op/ | 64/32 | CPUID | Description |
---|---|---|---|---|
| FV | V/V | AVX512VL | Convert the exponent of packed double-precision floating-point values in the source operand to DP FP results representing unbiased integer exponents and stores the results in the destination register. |
| FV | V/V | AVX512VL | Convert the exponent of packed double-precision floating-point values in the source operand to DP FP results representing unbiased integer exponents and stores the results in the destination register. |
| FV | V/V | AVX512F | Convert the exponent of packed double-precision floating-point values in the source operand to DP FP results representing unbiased integer exponents and stores the results in the destination under writemask k1. |
Instruction Operand Encoding
Op/En | Operand 1 | Operand 2 | Operand 3 | Operand 4 |
---|---|---|---|---|
FV | ModRM:reg (w) | ModRM:r/m (r) | NA | NA |
Description
Extracts the biased exponents from the normalized DP FP representation of each qword data element of the source operand (the second operand) as unbiased signed integer value, or convert the denormal representation of input data to unbiased negative integer values. Each integer value of the unbiased exponent is converted to double-precision FP value and written to the corresponding qword elements of the destination operand (the first operand) as DP FP numbers.
The destination operand is a ZMM/YMM/XMM register and updated under the writemask. The source operand can be a ZMM/YMM/XMM register, a 512/256/128-bit memory location, or a 512/256/128-bit vector broadcasted from a 64-bit memory location.
EVEX.vvvv is reserved and must be 1111b, otherwise instructions will #UD.
Each GETEXP operation converts the exponent value into a FP number (permitting input value in denormal repre-sentation). Special cases of input values are listed in Table 5-7.
The formula is:
GETEXP(x) = floor(log2(|x|))
Notation floor(x) stands for the greatest integer not exceeding real number x.
Table 5-7. VGETEXPPD/SD Special Cases
Input Operand | Result | Comments |
---|---|---|
src1 = NaN | QNaN(src1) | No Exceptions |
0 < | src1 | < INF |
floor(log2( | src1 | )) |
src1 | ||
= +INF | +INF | |
src1 | = 0 | |
-INF |
Operation
VGETEXPPD (EVEX encoded versions)
(KL, VL) = (2, 128), (4, 256), (8, 512) FOR j <- 0 TO KL-1 i <- j * 64 IF k1[j] OR *no writemask* THEN IF (EVEX.b = 1) AND (SRC *is memory*) THEN DEST[i+63:i] <- ConvertExpDPFP(SRC[63:0]) ELSE DEST[i+63:i] <- ConvertExpDPFP(SRC[i+63:i]) FI; ELSE IF *merging-masking* ; merging-masking THEN *DEST[i+63:i] remains unchanged* ELSE ; zeroing-masking DEST[i+63:i] <- 0 FI FI; ENDFOR DEST[MAX_VL-1:VL] <- 0
Intel C/C++ Compiler Intrinsic Equivalent
VGETEXPPD __m512d _mm512_getexp_pd(__m512d a); VGETEXPPD __m512d _mm512_mask_getexp_pd(__m512d s, __mmask8 k, __m512d a); VGETEXPPD __m512d _mm512_maskz_getexp_pd(__mmask8 k, __m512d a); VGETEXPPD __m512d _mm512_getexp_round_pd(__m512d a, int sae); VGETEXPPD __m512d _mm512_mask_getexp_round_pd(__m512d s, __mmask8 k, __m512d a, int sae); VGETEXPPD __m512d _mm512_maskz_getexp_round_pd(__mmask8 k, __m512d a, int sae); VGETEXPPD __m256d _mm256_getexp_pd(__m256d a); VGETEXPPD __m256d _mm256_mask_getexp_pd(__m256d s, __mmask8 k, __m256d a); VGETEXPPD __m256d _mm256_maskz_getexp_pd(__mmask8 k, __m256d a); VGETEXPPD __m128d _mm_getexp_pd(__m128d a); VGETEXPPD __m128d _mm_mask_getexp_pd(__m128d s, __mmask8 k, __m128d a); VGETEXPPD __m128d _mm_maskz_getexp_pd(__mmask8 k, __m128d a);
SIMD Floating-Point Exceptions
Invalid, Denormal
Other Exceptions
See Exceptions Type E2.
#UD If EVEX.vvvv != 1111B.
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