XADD

Exchange and Add

참고 사항

Instruction Operand Encoding

Description

Exchanges the first operand (destination operand) with the second operand (source operand), then loads the sum of the two values into the destination operand. The destination operand can be a register or a memory location; the source operand is a register.

In 64-bit mode, the instruction's default operation size is 32 bits. Using a REX prefix in the form of REX.R permits access to additional registers (R8-R15). Using a REX prefix in the form of REX.W promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.

This instruction can be used with a LOCK prefix to allow the instruction to be executed atomically.

IA-32 Architecture Compatibility

IA-32 processors earlier than the Intel486 processor do not recognize this instruction. If this instruction is used, you should provide an equivalent code sequence that runs on earlier processors.

Operation

TEMP <- SRC + DEST;
SRC <- DEST;
DEST <- TEMP;

Flags Affected

The CF, PF, AF, SF, ZF, and OF flags are set according to the result of the addition, which is stored in the destination operand.

Protected Mode Exceptions

#GP(0)

• If the destination is located in a non-writable segment.

• If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.

• If the DS, ES, FS, or GS register contains a NULL segment selector.

#SS(0)

• If a memory operand effective address is outside the SS segment limit.

#PF(fault-code)

• If a page fault occurs.

#AC(0)

• If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.

#UD

• If the LOCK prefix is used but the destination is not a memory operand.

Real-Address Mode Exceptions

#GP

• If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.

#SS

• If a memory operand effective address is outside the SS segment limit.

#UD

• If the LOCK prefix is used but the destination is not a memory operand.

Virtual-8086 Mode Exceptions

#GP(0)

• If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.

#SS(0)

• If a memory operand effective address is outside the SS segment limit.

#PF(fault-code)

• If a page fault occurs.

#AC(0)

• If alignment checking is enabled and an unaligned memory reference is made.

#UD

• If the LOCK prefix is used but the destination is not a memory operand.

Compatibility Mode Exceptions

Same exceptions as in protected mode.

64-Bit Mode Exceptions

#SS(0)

• If a memory address referencing the SS segment is in a non-canonical form.

#GP(0)

• If the memory address is in a non-canonical form.

#PF(fault-code)

• If a page fault occurs.

#AC(0)

• If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.

#UD

• If the LOCK prefix is used but the destination is not a memory operand.

첫 댓글을 달아주세요!

강좌에 관련 없이 궁금한 내용은 여기를 사용해주세요

다음으로 로그인

또는 직접 입력하세요 (댓글 수정시 비밀번호가 필요합니다)

댓글 달기

댓글을 불러오는 중입니다..