PDEP (Intel x86/64 assembly instruction)

모두의 코드
PDEP (Intel x86/64 assembly instruction)

작성일 : 2020-09-01 이 글은 735 번 읽혔습니다.

PDEP

Parallel Bits Deposit

참고 사항

아래 표를 해석하는 방법은 x86-64 명령어 레퍼런스 읽는 법 글을 참조하시기 바랍니다.

Opcode/ Instruction	Op/ En	64/32 -bit Mode	CPUID Feature Flag	Description
`VEX.NDS.LZ.F2.0F38.W0 F5 /r` PDEP r32a r32b r/m32	RVM	V/V	BMI2	Parallel deposit of bits from r32b using mask in r/m32, result is writ-ten to r32a.
`VEX.NDS.LZ.F2.0F38.W1 F5 /r` PDEP r64a r64b r/m64	RVM	V/N.E.	BMI2	Parallel deposit of bits from r64b using mask in r/m64, result is writ-ten to r64a.

Instruction Operand Encoding

Op/En	Operand 1	Operand 2	Operand 3	Operand 4
RVM	ModRM:reg (w)	VEX.vvvv (r)	ModRM:r/m (r)	NA

Description

PDEP uses a mask in the second source operand (the third operand) to transfer/scatter contiguous low order bits in the first source operand (the second operand) into the destination (the first operand). PDEP takes the low bits from the first source operand and deposit them in the destination operand at the corresponding bit locations that are set in the second source operand (mask). All other bits (bits not set in mask) in destination are set to zero.

This instruction is not supported in real mode and virtual-8086 mode. The operand size is always 32 bits if not in 64-bit mode. In 64-bit mode operand size 64 requires VEX.W1. VEX.W1 is ignored in non-64-bit modes. An attempt to execute this instruction with VEX.L not equal to 0 will cause #UD.

Figure 4-8. PDEP Example

Operation

TEMP <- SRC1;
MASK <- SRC2;
DEST <- 0 ;
m<- 0, k<- 0;
DOWHILE m< OperandSize
          IF MASK[ m] = 1 THEN
                DEST[ m] <- TEMP[ k];
               k <- k+ 1;
          FI
          m <- m+ 1;
OD

Flags Affected

None.

Intel C/C++ Compiler Intrinsic Equivalent

PDEP : unsigned __int32 _pdep_u32(unsigned __int32 src, unsigned __int32 mask);
PDEP : unsigned __int64 _pdep_u64(unsigned __int64 src, unsigned __int32 mask);

SIMD Floating-Point Exceptions

None

Other Exceptions

See Section 2.5.1, "Exception Conditions for VEX-Encoded GPR Instructions", Table 2-29; additionally

#UD If VEX.W = 1.

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모두의 코드 PDEP (Intel x86/64 assembly instruction)