VRANGEPD

Range Restriction Calculation For Packed Pairs of Float64 Values

참고 사항

Instruction Operand Encoding

Description

This instruction calculates 2/4/8 range operation outputs from two sets of packed input double-precision FP values in the first source operand (the second operand) and the second source operand (the third operand). The range outputs are written to the destination operand (the first operand) under the writemask k1.

Bits7:4 of imm8 byte must be zero. The range operation output is performed in two parts, each configured by a two-bit control field within imm8[3:0]:

• Imm8[1:0] specifies the initial comparison operation to be one of max, min, max absolute value or min absolute value of the input value pair. Each comparison of two input values produces an intermediate result that combines with the sign selection control (Imm8[3:2]) to determine the final range operation output.

• Imm8[3:2] specifies the sign of the range operation output to be one of the following: from the first input value, from the comparison result, set or clear.

The encodings of Imm8[1:0] and Imm8[3:2] are shown in Figure 5-27.

When one or more of the input value is a NAN, the comparison operation may signal invalid exception (IE). Details with one of more input value is NAN is listed in Table 5-12. If the comparison raises an IE, the sign select control (Imm8[3:2] has no effect to the range operation output, this is indicated also in Table 5-12.

When both input values are zeros of opposite signs, the comparison operation of MIN/MAX in the range compare operation is slightly different from the conceptually similar FP MIN/MAX operation that are found in the instructions VMAXPD/VMINPD. The details of MIN/MAX/MIN_ABS/MAX_ABS operation for VRANGEPD/PS/SD/SS for magni-tude-0, opposite-signed input cases are listed in Table 5-13.

Additionally, non-zero, equal-magnitude with opposite-sign input values perform MIN_ABS or MAX_ABS compar-ison operation with result listed in Table 5-14.

Table 5-12. Signaling of Comparison Operation of One or More NaN Input Values and Effect of Imm8[3:2]

Table 5-13. Comparison Result for Opposite-Signed Zero Cases for MIN, MIN_ABS and MAX, MAX_ABS

Table 5-14. Comparison Result of Equal-Magnitude Input Cases for MIN_ABS and MAX_ABS, (|a| = |b|, a>0, b<0)

Operation

VRANGEPD (EVEX encoded versions)

(KL, VL) = (2, 128), (4, 256), (8, 512)
FOR j <-  0 TO KL-1
    i <-  j * 64
    IF k1[j] OR *no writemask* THEN
                IF (EVEX.b == 1) AND (SRC2 *is memory*)
                      THEN DEST[i+63:i] <-  RangeDP (SRC1[i+63:i], SRC2[63:0], CmpOpCtl[1:0], SignSelCtl[1:0]);
                      ELSE DEST[i+63:i] <-  RangeDP (SRC1[i+63:i], SRC2[i+63:i], DAZ, CmpOpCtl[1:0], SignSelCtl[1:0]);
                FI;
    ELSE 
          IF *merging-masking* ; merging-masking
                THEN *DEST[i+63:i] remains unchanged*
                ELSE  ; zeroing-masking
                      DEST[i+63:i] = 0
          FI;
    FI;
ENDFOR;
DEST[MAX_VL-1:VL] <-  0
The following example describes a common usage of this instruction for checking that the input operand isbounded between $$\pm$$1023.
VRANGEPD zmm_dst, zmm_src, zmm_1023, 02h;
Where:
            zmm_dst is the destination operand.
            zmm_src is the input operand to compare against $$\pm$$1023 (this is SRC1).
            zmm_1023 is the reference operand, contains the value of 1023 (and this is SRC2).
            IMM=02(imm8[1:0]='10) selects the Min Absolute value operation with selection of SRC1.sign.
In case |zmm_src| < 1023 (i.e. SRC1 is smaller than 1023 in magnitude), then its value will be written intozmm_dst. Otherwise, the value stored in zmm_dst will get the value of 1023 (received on zmm_1023, which isSRC2).
However, the sign control (imm8[3:2]='00) instructs to select the sign of SRC1 received from zmm_src. So, evenin the case of |zmm_src| *   1023, the selected sign of SRC1 is kept. 
Thus, if zmm_src < -1023, the result of VRANGEPD will be the minimal value of -1023 while if zmm_src > +1023,the result of VRANGE will be the maximal value of +1023.

Intel C/C++ Compiler Intrinsic Equivalent

VRANGEPD __m512d _mm512_range_pd(__m512d a, __m512d b, int imm);
VRANGEPD __m512d _mm512_range_round_pd(__m512d a, __m512d b, int imm, int sae);
VRANGEPD __m512d _mm512_mask_range_pd(__m512 ds, __mmask8 k, __m512d a,
                                      __m512d b, int imm);
VRANGEPD __m512d _mm512_mask_range_round_pd(__m512d s, __mmask8 k, __m512d a,
                                            __m512d b, int imm, int sae);
VRANGEPD __m512d _mm512_maskz_range_pd(__mmask8 k, __m512d a, __m512d b,
                                       int imm);
VRANGEPD __m512d _mm512_maskz_range_round_pd(__mmask8 k, __m512d a, __m512d b,
                                             int imm, int sae);
VRANGEPD __m256d _mm256_range_pd(__m256d a, __m256d b, int imm);
VRANGEPD __m256d _mm256_mask_range_pd(__m256d s, __mmask8 k, __m256d a,
                                      __m256d b, int imm);
VRANGEPD __m256d _mm256_maskz_range_pd(__mmask8 k, __m256d a, __m256d b,
                                       int imm);
VRANGEPD __m128d _mm_range_pd(__m128 a, __m128d b, int imm);
VRANGEPD __m128d _mm_mask_range_pd(__m128 s, __mmask8 k, __m128d a, __m128d b,
                                   int imm);
VRANGEPD __m128d _mm_maskz_range_pd(__mmask8 k, __m128d a, __m128d b, int imm);

SIMD Floating-Point Exceptions

Invalid, Denormal

Other Exceptions

See Exceptions Type E2.

첫 댓글을 달아주세요!

강좌에 관련 없이 궁금한 내용은 여기를 사용해주세요

다음으로 로그인

또는 직접 입력하세요 (댓글 수정시 비밀번호가 필요합니다)

댓글 달기

댓글을 불러오는 중입니다..