모두의 코드
VPBROADCASTM (Intel x86/64 assembly instruction)

작성일 : 2020-09-01 이 글은 553 번 읽혔습니다.

VPBROADCASTM

Broadcast Mask to Vector Register

참고 사항

아래 표를 해석하는 방법은 x86-64 명령어 레퍼런스 읽는 법 글을 참조하시기 바랍니다.

Opcode/
Instruction

Op/
En

64/32
bit Mode
Support

CPUID
Feature
Flag

Description

EVEX.128.F3.0F38.W1 2A /r
VPBROADCASTMB2Q xmm1 k1

RM

V/V

AVX512VL
AVX512CD

Broadcast low byte value in k1 to two locations in xmm1.

EVEX.256.F3.0F38.W1 2A /r
VPBROADCASTMB2Q ymm1 k1

RM

V/V

AVX512VL
AVX512CD

Broadcast low byte value in k1 to four locations in ymm1.

EVEX.512.F3.0F38.W1 2A /r
VPBROADCASTMB2Q zmm1 k1

RM

V/V

AVX512CD

Broadcast low byte value in k1 to eight locations in zmm1.

EVEX.128.F3.0F38.W0 3A /r
VPBROADCASTMW2D xmm1 k1

RM

V/V

AVX512VL
AVX512CD

Broadcast low word value in k1 to four locations in xmm1.

EVEX.256.F3.0F38.W0 3A /r
VPBROADCASTMW2D ymm1 k1

RM

V/V

AVX512VL
AVX512CD

Broadcast low word value in k1 to eight locations in ymm1.

EVEX.512.F3.0F38.W0 3A /r
VPBROADCASTMW2D zmm1 k1

RM

V/V

AVX512CD

Broadcast low word value in k1 to sixteen locations in zmm1.

Instruction Operand Encoding

Op/En

Operand 1

Operand 2

Operand 3

Operand 4

RM

ModRM:reg (w)

ModRM:r/m (r)

NA

NA

Description

Broadcasts the zero-extended 64/32 bit value of the low byte/word of the source operand (the second operand) to each 64/32 bit element of the destination operand (the first operand). The source operand is an opmask register. The destination operand is a ZMM register (EVEX.512), YMM register (EVEX.256), or XMM register (EVEX.128).

EVEX.vvvv is reserved and must be 1111b otherwise instructions will #UD.

Operation

VPBROADCASTMB2Q

(KL, VL) = (2, 128), (4, 256), (8, 512)
FOR j <-  0 TO KL-1
    i <-  j*64
    DEST[i+63:i] <-  ZeroExtend(SRC[7:0])
ENDFOR
DEST[MAX_VL-1:VL] <-  0

VPBROADCASTMW2D

(KL, VL) = (4, 128), (8, 256),(16, 512)
FOR j <-  0 TO KL-1
    i <-  j*32
    DEST[i+31:i] <-  ZeroExtend(SRC[15:0])
ENDFOR
DEST[MAX_VL-1:VL] <-  0

Intel C/C++ Compiler Intrinsic Equivalent

VPBROADCASTMB2Q __m512i _mm512_broadcastmb_epi64(__mmask8);
VPBROADCASTMW2D __m512i _mm512_broadcastmw_epi32(__mmask16);
VPBROADCASTMB2Q __m256i _mm256_broadcastmb_epi64(__mmask8);
VPBROADCASTMW2D __m256i _mm256_broadcastmw_epi32(__mmask8);
VPBROADCASTMB2Q __m128i _mm_broadcastmb_epi64(__mmask8);
VPBROADCASTMW2D __m128i _mm_broadcastmw_epi32(__mmask8);

SIMD Floating-Point Exceptions

None

Other Exceptions

EVEX-encoded instruction, see Exceptions Type E6NF.

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