모두의 코드
SAHF (Intel x86/64 assembly instruction)
SAHF
Store AH into Flags
참고 사항
아래 표를 해석하는 방법은 x86-64 명령어 레퍼런스 읽는 법 글을 참조하시기 바랍니다.
Opcode* | Instruction | Op/ | 64-Bit | Compat/ | Description |
|---|---|---|---|---|---|
9E | NP | Invalid* | Valid | Loads SF, ZF, AF, PF, and CF from AH into EFLAGS register. |
* Valid in specific steppings. See Description section
Instruction Operand Encoding
Op/En | Operand 1 | Operand 2 | Operand 3 | Operand 4 |
|---|---|---|---|---|
NP | NA | NA | NA | NA |
Description
Loads the SF, ZF, AF, PF, and CF flags of the EFLAGS register with values from the corresponding bits in the AH register (bits 7, 6, 4, 2, and 0, respectively). Bits 1, 3, and 5 of register AH are ignored; the corresponding reserved bits (1, 3, and 5) in the EFLAGS register remain as shown in the "Operation" section below.
This instruction executes as described above in compatibility mode and legacy mode. It is valid in 64-bit mode only if CPUID.80000001H:ECX.LAHF-SAHF[bit 0] = 1.
Operation
IF IA-64 Mode
THEN
IF CPUID.80000001H.ECX[0] = 1;THENRFLAGS(SF:ZF:0:AF:0:PF:1:CF) <- AH;ELSE
#UD;
FI
ELSE
EFLAGS(SF:ZF:0:AF:0:PF:1:CF) <- AH;
FI;
Flags Affected
The SF, ZF, AF, PF, and CF flags are loaded with values from the AH register. Bits 1, 3, and 5 of the EFLAGS register are unaffected, with the values remaining 1, 0, and 0, respectively.
Protected Mode Exceptions
None.
Real-Address Mode Exceptions
None.
Virtual-8086 Mode Exceptions
None.
Compatibility Mode Exceptions
None.
64-Bit Mode Exceptions
#UD
If CPUID.80000001H.ECX[0] = 0.
If the LOCK prefix is used.
댓글을 불러오는 중입니다..